OpenCAPI Consortium™ Releases Additional Specifications and Leverages IBM’s Open Memory Interface (OMI) Reference Designs


PISCATAWAY, N.J., Dec. 08, 2020 (GLOBE NEWSWIRE) -- The OpenCAPI Consortium™ announced today the release of two additional specifications including the OpenCAPI Data Link Layer (DL) Architecture and the 32Gbps PHY Signaling specifications. The DL Architecture specification is downloadable from the Consortium website (www.opencapi.org) for learning purposes. Following this 32Gbps PHY Signaling specification release will be the 32Gbps PHY Mechanical specification. These released specifications are in addition to the previously announced seven specifications1. 2.

1. https://www.globenewswire.com/news-release/2020/03/05/1996000/0/en/OpenCAPI-Consortium-Releases-New-Specifications.html
2. https://picante.today/it-industry/2020/09/24/167453/opencapi-consortium-releases-additional-specifications/

In addition, the Consortium was the recipient of IBM’s Open Memory Interface (OMI) open source RTL reference designs. OMI is a highly tuned OpenCAPI interface with a latency reduction focus. The Consortium will capitalize on these reference designs3.4.5. code named Fire and Ice. The Fire RTL is an FPGA-based implementation that was generated to validate an OMI Memory Buffer/Controller chip. Ice is an FPGA-based implementation that mimics an OMI Memory Buffer/Controller chip. These reference designs in addition to others are located on GitHub6.7.

3. https://abopen.com/news/openpower-foundation-ibm-release-fire-and-ice-omi-reference-implementations/
4. https://openpowerfoundation.org/the-next-step-in-the-openpower-foundation-journey/
5. https://www.techrepublic.com/article/why-ibm-sees-opencapi-and-omi-as-the-future-for-accelerator-driven-computing/
6. https://github.com/OpenCAPI/omi_host_fire (host side)
7. https://github.com/OpenCAPI/omi_device_ice (device side)

About OpenCAPI Consortium
The OpenCAPI Consortium is an open forum to manage the OpenCAPI specification and ecosystem.  OpenCAPI is a not-for-profit organization formed in October 2016 to create an open coherent high-performance bus interface based on a new bus standard called Open Coherent Accelerator Processor Interface (OpenCAPI) and grow the ecosystem that utilizes this interface.  This initiative is being driven by the emerging accelerated computing and advanced memory/storage that requires openly available technical solutions. 

To learn more about the OpenCAPI Consortium, go to https://opencapi.org

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