Arasan Chip Systems to Deliver a Keynote at Design & Reuse's IP-SoC Day Seminar in Santa Clara

Arasan Presents a Total IP Solutions Paradigm as Part of the IP-SoC Day World Tour


SAN JOSE, Calif., March 15, 2010 (GLOBE NEWSWIRE) -- Arasan Chip Systems, Inc. ("Arasan"), a leading provider of Total Semiconductor IP Solutions, announced that it is participating in the IP – SoC Day World Tour event organized by Design & Reuse (D&R), Grenoble, France. This first-of-a-kind, unique event brings together leading Semiconductor IP providers with industry specialists and key members of the design community who are focused on maximizing IP integration with minimal effort in complex SoC designs.

The World-wide tour will be kicked off with the first event to be held on March 23-24, 2010 at the Hilton, Santa Clara, California, where Ram Gopalan, Senior Director of Corporate Marketing at Arasan, is presenting a keynote talk, "Designing with IP in the 21st century – Think Total!" Arasan Chip Systems is also moderating a panel discussion on the "Role of Software and System Tools in IP integration" at this event. This panel will address the need for software, hardware platforms and system tools in integrating complex IP into SoCs.

Preparing to deliver the talk, Ram Gopalan commented, "The increasing complexity of SoC designs has translated into a growing need for additional components that are necessary to successfully integrate an IP. Arasan has responded to this challenge by providing a consultative approach starting with IP selection and optimization, combined with vIP, software and hardware platforms as part of its Total IP Solutions offering to mitigate the risks and simplify the process of IP integration into SoCs."

"This forum addresses the growing complexity and sophistication of the Semiconductor IP ecosystem," commented Gabriele Saucier, Chairperson and CEO of Design & Reuse and organizer of IP-SoC Days. "Sponsoring companies such as Arasan will be presenting their perspective on industry evolution and later showcase their portfolio to interested customers, all in one venue." Details are available at: http://www.design-reuse.com/ipsocdays/santaclara/

The event consisting of keynote talks, panel discussions, product presentations and pre-arranged customer meetings, provides an innovative approach for participants to showcase their latest products and for customers to interact with these providers versus the traditional approaches of conferences with exhibits. In addition to Santa Clara, the IP-SoC Days are scheduled to be conducted in Tel-Aviv (Israel), Bangalore (India), Tokyo (Japan), Shanghai (China) and will conclude with the annual conference in Grenoble (France).

Arasan will be participating in multiple venues, presenting its product portfolio in addition to hosting panels and delivering keynote talks. Arasan provides all of the supporting collateral to enable the rapid integration of interface IP into SoCs, chipsets and application processors. This Total IP Solution consists of RTL IP, PHY IP, verification IP, software stacks, hardware platforms for development and validation – all backed by our World-class customer support.

About Arasan

Enabling Technology Adoption through Total IP Solutions - The Bus Stops Here!

Arasan Chip Systems based in San Jose, CA, USA, is a world-leading supplier of SoC Intellectual Property Solutions with a successful 15 year track record. Arasan delivers technology-leading IP focused on Bus Interfaces such as MIPI, SDIO, USB, PCIe, Ethernet, and Flash Storage Solutions of NAND, eMMC, SD, CF+, UFS and more, to the global electronics market. Arasan's Total Solution Approach starts with Technology Consulting using our Domain Expertise and includes all the building blocks required for technology adoption- RTL IP cores, Analog Mixed Signal IP Cores, Verification IP,  Portable Software Drivers / Stacks, Protocol Test & Analyzers, HDK's, and associated design services. Arasan Total IP Solution enables the rapid adoption of emerging technologies reducing our customer's time to market while minimizing risk and ensuring compliance to respective standards. 

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