Dublin, Jan. 29, 2015 (GLOBE NEWSWIRE) -- Research and Markets (http://www.researchandmarkets.com/research/5n6s4p/wolfson_wm7121) has announced the addition of the "Wolfson WM7121 & WM7132 - Top & Bottom Port MEMS Microphones Reverse Costing Analysis" report to their offering.
Set of 2 Reports Highlighting MEMS And Packaging Technologies Of Wolfson Microphones
Before its acquisition by Cirrus Logic for $467M in April 2014, Wolfson Microelectronics released a series of analog and digital MEMS microphones with revenues growing 70% from 2012 to 2013.
A teardown of Motorola Moto X smartphone revealed that from the three microphones integrated two were coming from Wolfson Microelectronics, the remaining one using an Infineon technology. Wolfson's WM7121 and WM7132 are respectively top and bottom port analog MEMS microphones.
Assembled in specific LGA cavity packages, both microphones use a capacitive sensing principle based on Wolfson proprietary MEMS technology.
One of the main interest of Wolfson's MEMS technology is the use of silicon nitride (SiN) instead of polysilicon for the transducer element. According to Wolfson, silicon nitride delivers lower stress and strain coefficients, leading to higher reliability.
COMPLETE TEAR DOWN WITH:
- Detailed Photos
- Precise Measurements
- Material Analysis
- Manufacturing Process Flow
- Supply Chain Evaluation
- Manufacturing Cost Analysis
- Selling Price Estimation
Please note: Price and number of pages are given for the set (two reports)
Key Topics Covered:
1. Glossary
2. Overview/Introduction, Wolfson Company Profile
2. Moto X teardown
4. Physical Analysis
Package
- Package Views & Dimensions
- Package Opening
- Package Cross-Section
ASIC Die
- View, Dimensions & Marking
- Delayering, Process Identification
- Cross-Section
- Process Characteristics
MEMS Die
- View & Dimensions
- Marking
- Dicing
- Bond Pads
- Membrane & Backplate
- Cross-Sections
5. Manufacturing Process Flow
- Global Overview
- ASIC Front-End Process
- ASIC Wafer Fabrication Unit
- MEMS Process Flow
- MEMS Wafer Fabrication Unit
- Packaging Process Flow
- Package Assembly Unit
6. Cost Analysis
- Main steps of economic analysis
- Yields Hypotheses
- ASIC Front-End Cost
- ASIC Back-End 0 : Probe Test & Dicing
- ASIC Wafer & Die Cost
- MEMS Front-End Cost
- MEMS Back-End 0 : Probe Test & Dicing
- MEMS Front-End Cost per process steps
- MEMS Wafer & Die Cost
- Back-End : Packaging Cost
- Back-End : Packaging Cost per Process Steps
- Back-End : Final Test Cost
- Microphone Component & Price Cost
For more information visit http://www.researchandmarkets.com/research/5n6s4p/wolfson_wm7121