What: Silistix, a provider of innovative software for on-chip communications solutions, will be attending the IP-Based SoC (IP-SoC) Design Conference and will participate on two panels: "How Disruptive Technologies will Shape SoC Design and EDA Tool Development" and "Network on Chip (NoC)." IP-SoC will be held at the World Trade Center, December 6-7, Grenoble, France. The Disruptive Technologies panel will be moderated by Jim Tully of Gartner/Dataquest. Other participating companies include CoWare, IBM Zurich Research Lab, Imperas, Lightspeed Logic and Synopsys. The NoC panel will be moderated by Huy Nam Nguyen of Bull S.A.S. Other panelists will be from Arteris, CEA/Leti, FZI Forschungszentrum Informatik, ST-Microelectronics and UPMC/LIP6. When:
Disruptive Technologies panel on December 6, 2006 at 11:00AM Network on Chip panel on December 7, 2006 at 3:00PMWhere: IP-SoC Conference at the World Trade Center, 5 place Robert Schuman, Grenoble, France. About Disruptive Technologies Changes in the electronics EDA tools are generally incremental in their influence on the overall chip design flow. However, there are instances when a disruptive technology results in a major change in the way that tool vendors develop and introduce their products and how designers use these tools. This panel will discuss several disruptive technologies including Network-on-Chip (NoC) and how their acceptance and use will influence the tools and design methodologies chip designers will need down the road. About Network on Chip (NoC) Progress in semiconductor technology enables the integration of thousands of resources on a single SoC. Managing this increasing complexity requires the separation of computation from communication. NoC is emerging as an alternative to existing on-chip communications to be used in many important applications for connecting large amounts of heterogeneous IP. NoC concepts share many issues in common with existing topics, but still require specific considerations on network protocol design and network interfaces. In addition to the conceptual and architectural aspects, panel discussions on NoC may be extended to design methodologies due to the specific suitability of NoC to platform-based and TLM approaches. About Silistix Silistix is a venture-funded spin-out of the University of Manchester, UK, with backing from Intel Capital. The company's focus is on the development and deployment of EDA tools for the design and synthesis of self-timed CHAIN technology for complex system-on-a-chip (SoC) communication. The company has offices in Manchester, England; San Jose, California; and Tokyo, Japan. For more information, call 408-573-6104 or visit www.silistix.com. Contact: For more information or to make an appointment to meet with Silistix at IP-SoC, contact Jim Lipman, Cain Communications, (U.S.) 925-606-1370, jlipman@caincom.com
Contact Information: Contact: Jim Lipman Cain Communications (U.S.) 925-606-1370 Email Contact