Dublin, Oct. 4, 2013 (GLOBE NEWSWIRE) -- Research and Markets (http://www.researchandmarkets.com/research/6qvn9x/avago_fbar_filter)
has announced the addition of the
"Avago FBAR Filter All-Silicon MEMS Duplexer Reverse Costing
Analysis" report to their offering.
The highest volume production MEMS using TSV Technology based on
AlN piezoelectric active layer
With more than 1 Billion units produced per year and a market share
of 65%, Avago Technologies clearly dominates the BAW filter market.
The ACMD-7612 is an UMTS Duplexer manufactured with Avago's film
bulk acoustic resonator (FBAR) technology which uses AlN
piezoelectric material for resonating layers.
The filters are hermetically wafer-level packaged with Avago's
Microcap bonded-wafer CSP technology, allowing the filters to be
assembled in a molded chip-on-board module of less than 1.2 mm
high.
TSVs are etched in the cap in order to report electrical contacts
and thus reduce filter dies size.
The ACMD-7612 is targeted for handsets or data terminals operating
in the UMTS Band I frequency range and features a Maximum RF Input
Power to Tx Port of ±33 dBm.
This report provides complete tear-down of the FBAR
duplexer with:
- Detailed photos
- Material analysis
- Schematic assembly description
- Manufacturing Process Flow (including AlN process, wafer capping
and TSV manufacturing)
- In-depth manufacturing cost analysis
- Supply chain evaluation
- Selling price estimation
Key Topics Covered:
Glossary
Overview/Introduction
Company Profile
Physical Analysis
- Physical Analysis Methodology
- Package Characteristics & Markings
- Package X-Ray
- Package Opening - Main Parts
- Package Cross-Section
- MEMS Dies Dimensions
- MEMS Dies Markings
- MEMS Dies Bond Pads & TSV
- Tx Die Opening
- Tx Die Cap
- Tx Die FBAR
- Rx Die Opening
- MEMS Die Cross-section - Overview
- MEMS Die Cross-section - TSV
- MEMS Die Cross-section - Membrane
- MEMS Die Cross-section - Contacts
Manufacturing Process Flow
- Global Overview
- MEMS Process Overview
- FBAR Process Flow
- Cap Process Flow
- Wafer Bonding Process Flow
- Description of the Wafer Fabrication Unit
- Component Packaging Process Flow
Cost Analysis
- Synthesis of the Cost Analysis
- Main Steps of Economic Analysis
- Yields Explanation
- Yields Hypotheses
- Dies per wafer & Probe Test
- MEMS Front-End Cost
- MEMS Front-End cost per Process Steps
- Back-End 0: Probe Test & Dicing Cost
- MEMS Dies Cost
- Back-End: Packaging Cost
- Back-End: Packaging Cost per steps
- Back-End: Final test Cost
- ACMD-7612 Component Cost (FE + BE 0 + BE 1)
Estimated Price Analysis
For more information visit
http://www.researchandmarkets.com/research/6qvn9x/avago_fbar_filter
Research and Markets
Laura Wood, Senior Manager.
U.S. Fax: 646-607-1907
Fax (outside U.S.): +353-1-481-1716
Sector: