DVCon U.S. 2024 Announces Keynote Speakers & Panel Focused on Generative AI

GAINESVILLE, Fla., Feb. 15, 2024 (GLOBE NEWSWIRE) -- The 2024 Design and Verification Conference and Exhibition United States (DVCon U.S.), sponsored by Accellera Systems Initiative, announced today that there will be two keynote speakers for attendees this year as well as a panel focused on generative Artificial Intelligence (AI). DVCon U.S. 2024 will be held March 4-7 at the DoubleTree by Hilton Hotel in San Jose, California.

The first keynote, “Addressing the Evolving Landscape of Automotive SoCs,” will be held on Tuesday, March 5 at 1:30 pm. It will be presented by Paul Cunningham, senior vice president and general manager of the system & verification group of Cadence Design Systems and his guest, Anthony Hill, a Texas Instruments (TI) Fellow, who also leads the Technology Backplane Organization for TI’s Processors Business.

Alex Starr, AMD Corporate Fellow responsible for AMD’s Shift Left Initiative and Verification Strategy, will present the second keynote, “From Chips to Checkered Flags: The Race Towards Real World Innovation,” on Wednesday, March 6 at 1:30 pm.

Wednesday, March 6, will begin at 8:00 am with a thought-provoking panel, “When Will We Be Able to Say, ‘EDA-GPT, Verify My ASIC?’” This panel invites participants to share and discuss their perspectives, experiences, insights, and apprehensions regarding the role of generative AI in verification. The panel will be moderated by Harry Foster, Chief Scientist Verification, Siemens EDA. Panelists include Daniel Schostak, Verification Architect & Fellow, ARM; Dan Yu, AI/ML Solutions Manager, Siemens EDA; Erik Berg, Principal SoC Verification Engineer, Microsoft; and Mark Ren, Director of Design and Automation Research, NVIDIA.

Other conference highlights include:

  • Accellera-sponsored luncheon on March 4 will focus on the Federated Simulation Standard Proposed Working Group (FSS PWG). Mark Burton, the FSS PWG Vice Chair will present the intent of the PWG. He will be joined by Yury Bayda, Principal Software Engineer at Ford Motor Company, who will discuss how a Federated Simulation standard will be beneficial to Ford.
  • Poster Ninja Warrior session on Wednesday, March 4 will include the top four posters battling it out for the Best Poster Award. Posters will be judged on a variety of factors, including audience reaction.

Registration for the keynotes, panel and exhibits-only is free. For more information and to register, visit the registration page.

For more information on the complete program, including the latest updates regarding the conference and expo, please visit the website.

About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit here. Follow DVCon on Facebook, LinkedIn or @dvcon_us on Twitter or to comment, please use #dvcon_us.

For more information, please contact:
 Laura LeBlanc Barbara Benjamin
 Conference Catalysts, LLC HighPointe Communications
 352-872-5544 Ext. 115 503-209-2323
 lleblanc@conferencecatalysts.com barbara@hipcom.com