MEDIA ALERT: EDA Consortium Kicks-Off New Legal Series, Hosts San Jose Mayor, Silicon Valley Patent Office Director at "Patents and Patent Litigation" Panel October 29
October 07, 2015 11:00 ET
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EDA Consortium
SAN JOSE, CA--(Marketwired - Oct 7, 2015) -
WHO: The international EDA Consortium (EDAC), provider of services, market awareness and a common voice for EDA and IP suppliers to the global...
REMINDER: MEDIA ALERT: EDA Consortium Executive Director to Be Keynote Speaker at Si2Con
October 05, 2015 11:00 ET
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EDA Consortium
SAN JOSE, CA--(Marketwired - Oct 5, 2015) -
WHO:
Robert P. Smith, executive director of the international EDA Consortium (EDAC), provider of services, market awareness and a common...
MEDIA ALERT: EDA Consortium Executive Director to Be Keynote Speaker at Si2Con
September 29, 2015 11:00 ET
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EDA Consortium
SAN JOSE, CA--(Marketwired - Sep 29, 2015) -
WHO:
Robert P. Smith, executive director of the international EDA Consortium (EDAC), provider of services, market awareness and a common...
EDA Industry Recognizes Dr. Walden C. Rhines of Mentor Graphics With the 2015 Phil Kaufman Award
September 08, 2015 11:00 ET
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EDA Consortium
SAN JOSE, CA--(Marketwired - Sep 8, 2015) - Dr. Walden (Wally) C. Rhines, chairman and chief executive officer (CEO) of Mentor Graphics Corporation, has been selected to be the recipient of the...
Bob Smith Selected as EDAC Executive Director
May 12, 2015 11:00 ET
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EDA Consortium
SAN JOSE, CA--(Marketwired - May 12, 2015) - The Electronic Design Automation (EDA) Consortium announced today that it has selected Robert (Bob) Smith as executive director, following the...
Lucio Lanza Resigns From Harris & Harris Group Board of Directors
March 04, 2015 11:00 ET
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Lanza techVentures
PALO ALTO, CA--(Marketwired - Mar 4, 2015) - Lucio Lanza today resigned from the board of directors of Harris & Harris Group, Inc.®, an investor in transformative companies enabled by...
Verific Design Automation Adds Features to UPF Parser for Enhanced Support of IEEE Standard
February 12, 2014 11:00 ET
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Verific
ALAMEDA, CA--(Marketwired - Feb 12, 2014) - Verific Design Automation, supplier of industry-standard, IEEE-compliant SystemVerilog and VHDL parsers, today announced enhancements to its parser for...
Verific Design Automation Ends 2013 With Double-Digit Revenue Increase
January 21, 2014 07:30 ET
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Verific
ALAMEDA, CA--(Marketwired - Jan 21, 2014) - Verific Design Automation, provider of SystemVerilog, Verilog and VHDL parsers, closed 2013 with a double-digit increase in revenue and 56 active user...
ASP-DAC Presents Vennsa Technologies' CEO With 10-Year Retrospective Most Influential Paper Award
January 21, 2014 07:00 ET
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Vennsa Technologies Inc.
TORONTO, ON--(Marketwired - Jan 21, 2014) - Dr. Andreas Veneris, president and chief executive officer of Vennsa Technologies Inc., will be the recipient of the 10-year Retrospective Most...
Tabula Adds SystemVerilog Support to Stylus Compiler With Verific Design Automation Parser
August 13, 2013 11:00 ET
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Verific Design Automation
ALAMEDA, CA--(Marketwired - Aug 13, 2013) - Verific Design Automation (www.verific.com), provider of SystemVerilog, Verilog and VHDL parsers, today announced that Tabula (www.tabula.com) has added...