Where DesignCon 2007, Santa Clara Convention Center, Santa Clara, California Booth #933 When Exhibits open Tuesday and Wednesday, January 30-31 What: Lightspeed Booth # 933 to hear about: Multi-Function I/O Lightspeed's Mask Reconfigurable I/O supports a wide range of signaling standards in a single I/O slot, providing high flexibility and high performance for use with mask reconfigurable logic technology embedded in an SoC or for creating a Structured ASIC. Logic Array Lightspeed's Logic Array technology with Mutable Tiles is the industry's leading array-based logic solution for deep-submicron semiconductor design, supporting logic requirements in ASSPs, CSSPs, Platform ASICs, and Structured ASICs. Embedded Test Lightspeed's test technology enables Platform ASICs or Structured ASICs where the test burden can be completely eliminated from the design team.
To arrange a meeting with Michael Sydow, VP of Customer engineering, during the conference (January 29 - February 1) to learn about Lightspeed's Mutable Tile technology in their Mask Reconfigurable IP, please contact:
Jim Lipman Cain Communications jlipman@caincom.com 925-606-1370About Lightspeed Logic Lightspeed Logic is a provider of mask reconfigurable intellectual property (IP), a digital logic implementation technology that provides time-to-market, yield, manufacturability, and development expense advantages over standard-cell implementation. Founded in 1996, Lightspeed has developed and brought to market four mask-reconfigurable architectures, the most recent of which is a regular logic structure available for multiple foundries, IDMs and process nodes. The company is currently working with customers at the 150, 90, 65, and 45 nm process nodes. Lightspeed's corporate headquarters are in Santa Clara, CA. You can find more information on Lightspeed at www.lightspeed.com.
Contact Information: Contact: Jim Lipman Cain Communications Email Contact 925-606-1370