SAN DIEGO, CA--(Marketwire - May 29, 2007) -


Silistix will demonstrate their new CHAINarchitect tool for easy exploration of new interconnect topologies and "what if" analyses to optimize on-chip communications during the following times: Monday through Wednesday 9AM-6PM, Thursday 9AM-1PM at the Silistix Booth #1384.


Design Automation Conference (DAC), San Diego, CA


Monday through Thursday, June 4-7, 2007

About Silistix

Silistix is the leading vendor of EDA tools and IP for the design of low-power, high-performance interconnect using self-timed techniques. Silistix products are used to solve fundamental problems in global timing closure, clock distribution, global consumer market pressures and effective utilization of advanced semiconductor process capabilities for System-on-Chip (SoC) devices. The company is venture funded and has offices in Manchester, England, San Jose, California, and Tokyo, Japan. For more information on Silistix and its products visit

Contact Information: For more information or to schedule a meeting with a Silistix representative, please contact: Jim Lipman Cain Communications Email Contact 925-606-1370