SANTA CLARA, CA--(Marketwire - June 10, 2008) -

Sidense at the Logic Non-Volatile Memory (LNVM) Event

President and CEO Xerxes Wania to participate on the panel, "Configuring
your NVM," which will address some of the confusing issues facing
designers who will be implementing embedded non-volatile memory on a chip.

CTO Wlodek Kurjanowicz will present a paper on, "Reliability
Characterization Challenges and Methodologies for OTP Memory Arrays,"
as part of the Quality and Reliability track.

LNVM Event
Hyatt Regency Hotel
Santa Clara, California

Wednesday, June 18
10:30 a.m. -- "Configuring your NVM"
3:00 p.m. --  "Reliability Characterization Challenges and Methodologies
               for OTP Memory Arrays"

Xerxes Wania, Sidense President and CEO
Wlodek Kurjanowicz, Sidense CTO

About Sidense

Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.

Sidense SiPROM and SLP OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit

Contact Information: For more information or to schedule a meeting with Sidense please contact: Jim Lipman Sidense 925-606-1370