SINGAPORE - 15 MARCH 2017, UNITED STATES--(Marketwired - March 15, 2017) - STATS ChipPAC Pte. Ltd. ("STATS ChipPAC" or the "Company"), a leading provider of advanced semiconductor packaging and test services, announced today that it has shipped 1.5 billion fan-out wafer level packages (FOWLP), also known in the industry as embedded Wafer Level Ball Grid Array (eWLB). In high volume production for over seven years, STATS ChipPAC has led the industry in FOWLP technology innovations and unit shipments.

"As an early adopter of FOWLP, STATS ChipPAC set an aggressive course in pushing the boundaries of advanced package architecture and manufacturing capabilities long before its peers. We have delivered a number of breakthrough achievements in package density, form factor and heterogeneous integration while continually driving innovations in the manufacturing process to provide a proven, cost effective advanced packaging platform for our customers," said Shim Il Kwon, Chief Technology Officer, STATS ChipPAC. "Shipping 1.5 billion eWLB packages is a testament to the growing adoption of this technology and the performance, size and cost advantages it provides to our customers."

FOWLP or eWLB is an advanced packaging technology platform that provides ultra-high density interconnection, superior electrical performance and the ability to integrate multiple heterogeneous dies in a cost effective, low-profile semiconductor package. STATS ChipPAC has a comprehensive portfolio of eWLB package designs, including small die, large die, multi-die, multi-layer, Micro-Electro-Mechanical Systems (MEMS), 2.5D and 3D Package-on-Package (PoP) and System-in-Package (SiP) architectures. A number of eWLB technology milestones have been driven by STATS ChipPAC such as dense vertical interconnections as high as 500 - 1,000 I/O, very fine line width and spacing down to 2um/2um and ultra-thin package profiles below 0.3mm (including solderball) for single packages and below 0.6mm for a stacked PoP with proven warpage control.

Although there are multiple variations of fan-out packaging in development in the industry, eWLB is the only FOWLP solution in the market today that has been in high volume manufacturing for over seven years. STATS ChipPAC has been instrumental in driving important optimizations in the manufacturing process and infrastructure. The eWLB manufacturing process has evolved into the innovative FlexLine™ manufacturing method which was introduced and implemented by STATS ChipPAC in 2014. The FlexLine™ method delivers unprecedented flexibility in producing both fan-out eWLB and fan-in wafer level chip scale packages (WLCSP) on the same manufacturing line for higher economies of scale and lower cost.

"The depth of production experience we have gained over the years has enabled STATS ChipPAC to continually refine and optimize the eWLB manufacturing process to drive higher output and lower cost per unit. We have made significant capital investments over the years to expand our capacity and continue to increase our production volume to support growing customer demand," said Cindy Palar, Managing Director, STATS ChipPAC Singapore. "Our 1.5 billion unit milestone reflects the confidence our customers have in eWLB technology and our ability to deliver an advanced packaging solution that best meets the cost and performance targets for their product requirements."

Currently all leading mobile products as well as some consumer electronics contain eWLB packages that are baseband processors, RF transceivers, connectivity devices, near field communication (NFC), security devices, MCUs, memory, memory controllers, RF MEMS and power management ICs (PMICs). The compelling performance, integration and size advantages of eWLB are also accelerating customer adoption in new and emerging market segments such as the Internet of Things (IoT), wearable electronics, millimeter wave (mmWave) technology for 5G wireless devices, MEMS and sensors, and automotive applications such as Advanced Driver Assistance Systems (ADAS).

Forward-Looking Statements
Certain statements in this release, including statements regarding the Company's expectations and intentions relating to the issue of the New Notes and use of proceeds thereof, are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilization; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; shortages in supply of key components and disruption in supply chain; disruption of our operations and other difficulties related to the relocation of our China operations; loss of directors, key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; ownership of our ordinary shares by JCET-SC (Singapore) Pte. Ltd. ("JCET-SC"), a special purpose vehicle established for the purpose of acquiring us by a consortium comprising Jiangsu Changjiang Electronics Technology Co., Ltd. ("JCET"), the National Integrated Circuit Industry Investment Fund Co., Ltd. and Semiconductor Manufacturing International Corporation, each of which may have conflicting interests with other holders of our securities; our inability to capture all or any of the benefits from acquisitions and investments in other companies and businesses or from the acquisition of us by JCET-SC; loss of customers or failure to compete effectively with our former Taiwan subsidiaries which we have recently divested; labor union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; and natural calamities and disasters, including outbreaks of epidemics and communicable diseases. STATS ChipPAC does not intend, and does not assume any obligation to update any forward-looking statements to reflect subsequent events or circumstances. References to "$" are to the lawful currency of the United States of America.

About STATS ChipPAC Pte. Ltd.
STATS ChipPAC Pte. Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices throughout Asia, the United States and Europe. STATS ChipPAC is a member of the JCET group of companies. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.